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Fully-integrated Ldo Voltage Regulator for Digital Circuits : Volume 9, Issue 18 (01/08/2011)

By Lüders, M.

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Book Id: WPLBN0003983603
Format Type: PDF Article :
File Size: Pages 5
Reproduction Date: 2015

Title: Fully-integrated Ldo Voltage Regulator for Digital Circuits : Volume 9, Issue 18 (01/08/2011)  
Author: Lüders, M.
Volume: Vol. 9, Issue 18
Language: English
Subject: Science, Advances, Radio
Collections: Periodicals: Journal and Magazine Collection (Contemporary), Copernicus GmbH
Publication Date:
Publisher: Copernicus Gmbh, Göttingen, Germany
Member Page: Copernicus Publications


APA MLA Chicago

Eversmann, B., Schmitt-Landsiedel, D., Brederlow, R., & Lüders, M. (2011). Fully-integrated Ldo Voltage Regulator for Digital Circuits : Volume 9, Issue 18 (01/08/2011). Retrieved from

Description: Munich University of Technology, Munich, Germany. Low-dropout (LDO) voltage regulators are widely used to supply low-voltage digital circuits. For recent ultra-low-power microcontroller systems, a fully-integrated LDO without any external capacitance is preferred in order to achieve a fast and energy-efficient wake-up.

Commonly, an LDO is specified, designed and verified for DC load currents. In contrast, a digital load creates large current spikes. As an LDO designed for low quiescent current is too slow to react on fast current spikes, a minimum on-chip capacitance is required to keep the supply voltage within a certain error window. Different fully-integrated LDO topologies are investigated regarding their suitability to supply low-voltage digital circuits. The any-load stable LDO topology is selected and implemented on a 0.13 μm test-chip. The LDO is able to provide a maximum load current of 2.5 mA while consuming a quiescent current of 17 μA.

Fully-integrated LDO voltage regulator for digital circuits

Zwerg, M., Baumann, A., Kuhn, R., Arnold, M., Nerlich, R., Herzog, M., Ledwa, R., Sichert, C., Rzehak, V., Thanigai, P., and Eversmann, B.: An 82 μA/MHz Microcontroller with Embedded FeRAM for Energy-Harvesting Applications, IEEE ISSCC 2011, 334–335, 2011.; Kristjansson, E.: ARM7 Low Power Design, White Paper, November 2006.; Guo, J. and Leung, K.: A 6 μW Chip-Area-Efficient Output-Capacitorless LDO in 90-nm CMOS Technology, IEEE JSSC, 45(9), 1896–1905, 2010.; Popovich, M., Friedman, E., Secareanu, R., and Hartin, O.: Efficient placement of distributed on-chip decoupling capacitors in nanoscale ICs, IEEE ICCAD 2007, 811–816, 2007.; Leung, K. and Mok, P.: A capacitor-free CMOS low-dropout regulator with damping-factor-control frequency compensation, IEEE JSSC, 38(10), 1691–1702, 2003.; Ivanov, V.: Design Methodology and Circuit Techniques for Any-Load Stable LDOs with Instant Load Regulation and Low Noise, Analog Circuit Design, 339–358, 2009.; Thandri B. and Silva-Martinez, J.: A robust feedforward compensation scheme for multistage operational trans-conductance amplifiers with no Miller capacitors, IEEE JSSC, 38(2), 237–243, 2003.; Ramirez-Angulo, J., Gupta, S., Padilla, I., Carvajal, R., Torralba, A., Jimenez, M., and Munoz, F.: Comparison of conventional and new flipped voltage structures with increased input/output signal swing and current sourcing/sinking capabilities, IEEE MWSCAS 2005, 2, 1151–1154, 2005.


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